1. Field of the Invention
The present invention relates to a power supply circuit. More particularly, the present invention relates to a booster circuit generating a voltage higher than an external power supply voltage by raising the voltage from the external power supply voltage or a down converter or other DC (direct current)-DC converter generating a voltage lower than the external power supply voltage by lowering the voltage from the external power supply voltage.
2. Description of the Related Art
In recent years, the practice in EEPROMs, flash memories, and other read only memories which can be electrically rewritten has been to supply only a single low power supply voltage from the outside, generate inside the chip an internal voltage higher than the voltage supplied from the outside, and write data into the memory by the high voltage inside the chip.
However, the voltage of the external power supply is being reduced as a general trend and the boosting efficiency decreases with the lower external voltage. Therefore, it has not been possible to generate an internal boosted voltage having a sufficient power.
On the other hand, the external power supply used is usually a 5 V single power supply, but it has become necessary to operate semiconductor devices at a lower internal voltage due to the desire to deal with the deterioration of the voltage resistance of semiconductor devices accompanying higher integration and the desire to reduce the power consumption.
However, the loss caused by the operation of a power supply circuit in the chip is large and obstructs the reduction of the power consumption.